8.5.4 CONFIG4
| Name: | CONFIG4 |
| Address: | 0x300003 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| XINST | LVP | STVREN | PPS1WAY | ZCD | BORV[1:0] | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ||
Bit 7 – XINST Extended Instruction Set Enable
| Value | Description |
|---|---|
| 1 | Extended Instruction Set and Indexed Addressing mode disabled (Legacy mode) |
| 0 | Extended Instruction Set and Indexed Addressing mode enabled |
Bit 5 – LVP Low-Voltage Programming Enable
| Value | Description |
|---|---|
| 1 | Low-Voltage Programming enabled. MCLR/VPP pin function is MCLR. The MCLRE Configuration bit is ignored. |
| 0 | HV on MCLR/VPP must be used for programming |
Bit 4 – STVREN Stack Overflow/Underflow Reset Enable
| Value | Description |
|---|---|
| 1 | Stack Overflow or Underflow will cause a Reset |
| 0 | Stack Overflow or Underflow will not cause a Reset |
Bit 3 – PPS1WAY PPSLOCKED One-Way Set Enable
| Value | Description |
|---|---|
| 1 | The PPSLOCKED bit can only be set once after an unlocking sequence is executed; once PPSLOCK is set, all future changes to PPS registers are prevented |
| 0 | The PPSLOCKED bit can be set and cleared as needed (unlocking sequence is required) |
Bit 2 – ZCD ZCD Disable
| Value | Description |
|---|---|
| 1 | ZCD disabled, ZCD can be enabled by setting the ZCDSEN bit of ZCDCON |
| 0 | ZCD always enabled, PMDx[ZCDMD] bit is ignored |
Bits 1:0 – BORV[1:0] Brown-out Reset Voltage Selection
| Value | Description |
|---|---|
| 11 | Brown-out Reset Voltage (VBOR) set to 1.90V |
| 10 | Brown-out Reset Voltage (VBOR) set to 2.45V |
| 01 | Brown-out Reset Voltage (VBOR) set to 2.7V |
| 00 | Brown-out Reset Voltage (VBOR) set to 2.85V |