31.5.9 ASI System Status

Name: ASI_SYS_STATUS
Offset: 0x0B
Reset: 0x01
Property: -

Bit 76543210 
   RSTSYSINSLEEPNVMPROGUROWPROG  LOCKSTATUS 
Access RRRRR 
Reset 00001 

Bit 5 – RSTSYS System Reset Active

When this bit is set to ‘1’, there is an active Reset on the system domain. When this bit is set to ‘0’, the system is not in the Reset state.

This bit is set to ‘0’ on read.

A Reset held from the ASI_RESET_REQ register will also affect this bit.

Bit 4 – INSLEEP System Domain in Sleep

When this bit is set to ‘1’, the system domain is in Idle or deeper Sleep mode. When this bit is set to ‘0’, the system is not in any sleep mode.

Bit 3 – NVMPROG Start NVM Programming

When this bit is set to ‘1’, NVM Programming can start from the UPDI.

When the programming is complete, reset the system through the UPDI Reset register.

Bit 2 – UROWPROG  Start User Row Programming

When this bit is set to ‘1’, User Row Programming can start from the UPDI.

When the User Row data have been written to the RAM, the UROWDONE bit in the ASI_SYS_CTRLA register must be written.

Bit 0 – LOCKSTATUS NVM Lock Status

When this bit is set to ‘1’, the device is locked. If a chip erase is done, and the lock bits are set to ‘0’, this bit will be read as ‘0’.