23.13.4 TxGATE

Timer Gate Source Selection Register
Name: TxGATE
Offset: 0x0310,0x0316

Bit 76543210 
    GSS[4:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bits 4:0 – GSS[4:0] Timer Gate Source Selection

Table 23-5. Timer Gate Sources
GSSGate Source
Timer1Timer3
11111-11001Reserved
11000CLC4_OUT
10111CLC3_OUT
10110CLC2_OUT
10101CLC1_OUT
10100ZCD_OUT
10011C2_OUT
10010C1_OUT
10001NCO1_OUT
10000PWM4S1P2_OUT
01111PWM4S1P1_OUT
01110PWM3S1P2_OUT
01101PWM3S1P1_OUT
01100PWM2S1P2_OUT
01011PWM2S1P1_OUT
01010PWM1S1P2_OUT
01001PWM1S1P1_OUT
01000CCP2_OUT
00111CCP1_OUT
00110TMR6_Postscaled_OUT
00101TMR4_Postscaled_OUT
00100TMR3_overflow_OUTReserved
00011TMR2_Postscaled_OUT
00010ReservedTMR1_overflow_OUT
00001TMR0_overflow_OUT
00000Pin selected by T1GPPSPin selected by T3GPPS