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20.4.2 PMD1
Bit 7 6 5 4 3 2 1 0 PWM1MD CCP2MD CCP1MD TMR6MD TMR4MD TMR2MD TMR3MD TMR1MD Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 7 – PWM1MD Disable PWM1
Module
Value Description
1
PWM1 module
disabled
0
PWM1 module
enabled
Bit 6 – CCP2MD Disable CCP2 Module
Value Description
1
CCP2 module disabled
0
CCP2 module enabled
Bit 5 – CCP1MD Disable CCP1 Module
Value Description
1
CCP1 module disabled
0
CCP1 module enabled
Bit 4 – TMR6MD Disable Timer TMR6
Value Description
1
TMR6 module disabled
0
TMR6 module enabled
Bit 3 – TMR4MD Disable Timer TMR4
Value Description
1
TMR4 module
disabled
0
TMR4 module
enabled
Bit 2 – TMR2MD Disable Timer TMR2
Value Description
1
TMR2 module disabled
0
TMR2 module enabled
Bit 1 – TMR3MD Disable Timer TMR3
Value Description
1
TMR3 module disabled
0
TMR3 module enabled
Bit 0 – TMR1MD Disable Timer TMR1
Value Description
1
TMR1 module disabled
0
TMR1 module enabled
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