4.1 Revision History


Doc Rev.	Date	Comments
D	03/2024	Document: Editorial updates Silicon Errata Issues updated: TWI: TIMEOUT Bit Field in the TWIn.MCTRLA Register is Corrupted Added new data sheet clarifications: SPI: SPI Clock Electrical Characteristics: Power Consumption. The Power Consumption in Power-Down (Max 25°C) reduced from 2 µA to 0.6 µA. SPI - Timing Characteristics Programming Time
C	06/2023	Silicon Errata Issues added: Device: Write Operation Lost if Consecutive Writes to Specific Address Spaces TCD: Halting TCD and Waiting for SW Restart Does Not Work if Compare Value A is ‘`0`’ or Dual Slope Mode is Used Added new data sheet clarification: Electrical Characteristics: I/O Pin Characteristics
B	03/2023	Document: Editorial updates Silicon Errata Issue added: NVMCTRL: Wrong Reset Value of NVMCTRL.CTRLA Register Silicon Errata Issues updated: Device: Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration Values RTC: Any Write to the RTC.CTRLA Register Resets the RTC and PIT Prescaler Counter TWI: TIMEOUT Bit Field in the TWIn.MCTRLA Register is Corrupted Silicon Errata Issue removed: USART: Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode Added new data sheet clarification: SLPCTRL: Sleep Mode Activity Overview ADC: VREFA
A	12/2020	Initial document release The content of the document has been restructured from: ATtiny212/412 Silicon Errata and Data Sheet Clarification ATtiny214/414/814 Silicon Errata and Data Sheet Clarification ATtiny416/816 Silicon Errata and Data Sheet Clarification to: ATtiny212/214/412/414/416 Silicon Errata and Data Sheet Clarification (this document) Refer to Appendix - Obsolete Revision History for further details. The following item is referring to changes between the latest revisions of the obsolete documents and this document: Added Pending Event Stuck When Disabling the ADC erratum