| C | 11/2020 |
- Added die revision C for ATtiny416
- Updated
Affected Silicon Revisions for ADC Interrupt Flags
Cleared When Reading RESH
- Added new errata:
- Device: Writing the OSCLOCK Fuse in FUSE.OSCCFG to
‘1’ Prevents Automatic Loading of Calibration
Values
- CCL: The CCL Must be Disabled to Change the
Configuration of a Single LUT
- TCA:
Restart Will Reset Counter Direction in NORMAL
and FRQ Mode
- TCB: CCMP and CNT Registers Operate as 16-Bit
Registers in 8-Bit PWM Mode
- TCD: Asynchronous Input Events Not Working When TCD
Counter Prescaler is Used
- USART:
- Full Range Duty Cycle Not Supported When
Validating LIN Sync Field
- Open-Drain Mode Does Not Work When TXD is
Configured as Output
- Start-of-Frame Detection Can Unintentionally
be Enabled in Active Mode when RXCIF is
‘
0’
|
| B | 10/2019 |
- Updated document
template
- The ADC errata,
ADC Functionality Cannot be Ensured with ADCCLK Above 1.5
MHz for All Conditions, has been split into two separate
erratas and rewritten
|
| A | 06/2019 | Initial document release |
