12.1.4.5 Protection Against Spurious Writes

A write sequence is valid only when both the following conditions are met. This prevents spurious writes that might lead to data corruption.

1. The WR, RD, SECWR, SECRD, and SECER bits are gated through the NVMEN bit. It is suggested to have the NVMEN bit cleared at all times except during memory writes and reads. This prevents memory operations if any of the control bits are set accidentally.
2. The NVM unlock sequence must be performed each time before all but the RD operation.