28.6.2 RCxSTA
| Name: | RCxSTA |
| Address: | 0x0F9C |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SPEN | RX9 | SREN | CREN | ADDEN | FERR | OERR | RX9D | ||
| Access | R/W | R/W | R/W/HC | R/W | R/W | R | R/HC | R/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – SPEN Serial Port Enable
| Value | Description |
|---|---|
| 1 | Serial port enabled |
| 0 | Serial port disabled (held in Reset) |
Bit 6 – RX9 9-Bit Receive Enable
| Value | Description |
|---|---|
| 1 | Selects 9-bit reception |
| 0 | Selects 8-bit reception |
Bit 5 – SREN Single Receive Enable
Bit 4 – CREN Continuous Receive Enable
| Value | Name | Description |
|---|---|---|
| 1 | SYNC = 1 |
Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN) |
| 0 | SYNC =
1 |
Disables continuous receive |
| 1 | SYNC =
0 |
Enables receiver |
| 0 | SYNC = 0 |
Disables receiver |
Bit 3 – ADDEN Address Detect Enable
| Value | Name | Description |
|---|---|---|
| 1 | SYNC = 0 AND RX9 =
1 |
The receive buffer is loaded and the interrupt occurs only when the ninth received bit is set |
| 0 | SYNC = 0 AND RX9 =
1 |
All bytes are received and interrupt always occurs. Ninth bit can be used as parity bit |
| X | RX9 = 0 OR SYNC =
1 |
Don't care |
Bit 2 – FERR Framing Error
| Value | Description |
|---|---|
| 1 | Unread byte in RCxREG has a framing error |
| 0 | Unread byte in RCxREG does not have a framing error |
Bit 1 – OERR Overrun Error
| Value | Description |
|---|---|
| 1 | Overrun error (can be cleared by clearing either SPEN or CREN bit) |
| 0 | No overrun error |
Bit 0 – RX9D Ninth bit of Received Data
This can be address/data bit or a parity bit which is determined by user firmware.