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Ultra-Low Power Arm® ARM926EJ-S™ Processor-Based MPU, 600 MHz, Camera, LCD, 2D Graphics, Dual 10/100 Ethernet, CAN, USB, QSPI, FLEXCOMs, AES, SHA
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Product Pages
SAM9X60
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4
System Controller
4.16
Power Management Controller (PMC)
4.16.3
Block Diagram
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
4.1
Overview
4.2
System Controller Write Protection (SYSCWP)
4.3
Advanced Interrupt Controller (AIC)
4.4
General Purpose Backup Registers (GPBR)
4.5
Watchdog Timer (WDT)
4.6
Reset Controller (RSTC)
4.7
Real-Time Timer (RTT)
4.8
Real-Time Clock (RTC)
4.9
Shutdown Controller (SHDWC)
4.10
Periodic Interval Timer (PIT)
4.11
64-bit Periodic Interval Timer (PIT64B)
4.12
Debug Unit (DBGU)
4.13
Special Function Registers (SFR)
4.14
Slow Clock Controller (SCKC)
4.15
Clock Generator
4.16
Power Management Controller (PMC)
4.16.1
Description
4.16.2
Embedded Characteristics
4.16.3
Block Diagram
4.16.4
Processor Clock Controller
4.16.5
USB Clock Controller
4.16.6
Free-Running Processor Clock
4.16.7
Peripheral and Generic Clock Controller
4.16.8
Programmable Clock Output Controller
4.16.9
Ultra-Low Power Mode and Fast Start-Up
4.16.10
Main Crystal Oscillator Failure Detection
4.16.11
32.768 kHz Crystal Oscillator Frequency Monitor
4.16.12
MCK Frequency Monitor
4.16.13
Recommended Programming Sequence
4.16.14
Clock Switching Details
4.16.15
Register Write Protection
4.16.16
Register Summary
4.17
Parallel Input/Output Controller (PIO)
5
Image Subsystem
6
Audio Subsystem
7
Security and Cryptography Subsystem
8
Connectivity Subsystem
9
USB Subsystem
10
Electrical and Mechanical Characteristics
11
Revision History
Microchip Information
4.16.3 Block Diagram
Figure 4-63.
General Clock Distribution Block Diagram
