The following tables describe the register addresses and bit fields for the Flash controller.
Table 6-7. Register Addresses for the NVMCON Register| Register | Address |
|---|
| NVMCON | 0x4400_0600 |
| NVMCONCLR | 0x4400_0604 |
| NVMCONSET | 0x4400_0608 |
| NVMKEY | 0x4400_0620 |
| NVMADDR | 0x4400_0630 |
| NVMDATA0 | 0x4400_0640 |
| NVMDATA1 | 0x4400_0650 |
| NVMDATA2 | 0x4400_0660 |
| NVMDATA3 | 0x4400_0670 |
| NVMSRCADDR | 0x4400_06C0 |
Table 6-8. Bit Fields for the NVMCON Register| Bit Field | Bit Mask |
|---|
| WREN_MASK | 0x4000 |
| NVMWR_MASK | 0x8000 |
| NVMERR_MASK | 0x2000 |
| BORERR_MASK | 0x1000 |
| NVMOP_MASK | 0x000F |
| WORD_NVMOP | 0b0001 |
| QUAD_NVMOP | 0b0010 |
| ROW_NVMOP | 0b0011 |
| PAGE_ERASE_NVMOP | 0b0100 |
| PFM_REGION_ERASE_NVMOP | 0b0101 |
