VDD=3V, unless stated otherwise.
Accuracy characteristics calculated based on 5% to 95% range of the DAC
Table 38-27. Power Supply, Reference, and Input
RangeSymbol | Description | Min. | Typ. | Max. | Unit |
---|
VDD | Supply Voltage(1) | 2.7 | 3 | 5.5 | V |
RLoad | Resistive External Load | 5 | - | - | kΩ |
CLoad | Capacitive External Load | - | - | 30 | pF |
VOUT | Output Voltage Range | 0.2 | - | VDD-0.2 | V |
IOUT | Output sink/source | - | 1 | - | mA |
- Supply voltage must meet the VDD specification for the VREF
level used as DAC reference
Table 38-28. Clock and Timing
CharacteristicsSymbol | Description | Conditions | Min. | Typ. | Max. | Unit |
---|
fDAC | Maximum Conversion Rate | 0.55V≤ VREF≤2.5V | - | 350 | - | ksps |
VREF=4.3V | - | 270 | - | ksps |
Table 38-29. Accuracy Characteristics
(3)Symbol | Description | Conditions | Min. | Typ. | Max. | Unit |
---|
Res | Resolution | | - | | 8 | bits |
INL | Integral Non-Linearity | 0.55V≤VREF≤4.3V | -1.2 | 0.3 | 1.2 | LSB |
DNL | Differential Non-Linearity | 0.55V≤VREF≤4.3V | -1 | 0.25 | 1 | LSB |
EOFF(1) | Offset Error | 0.55V≤VREF≤1.5 | -25 | -3 | 20 | mV |
VREF=2.5V | -30 | -6 | 10 |
VREF=4.3V | -40 | -10 | 0 |
EGAIN(2) | Gain Error | VREF=1.1V, VDD = 3.0
T=25°C | - | ±1 | - | LSB |
0.55V≤VREF≤4.3V | -10 | -1 | 10 |
- Offset including the DAC output buffer offset, this measured at DAC output pin
- Vref accuracy is included in the Gain
accuracy specification.
- These values are based on characterization and not covered by production test
limits.