19 Register Locking
This device provides several different types of register-level locking:
Locking using the System Lock Register – This mechanism, described in System Lock Register (see System Lock Register from Related Links), provides for a 2-way (locking and unlocking) write lock of system critical registers. It includes protection for the following registers:
- CRU.OSCCON
- CRU.OSCTRM
- CRU.SPLLCON
- CRU.RSWRST
- CRU.RNMICON
- CRU.PB1DIV
- CRU.PB2DIV
- CRU.PB3DIV
- CRU.SLEWCON
- CRU.CLK_DIAG
Locking using the CFGCON0.IOLOCK, CFGCON0.PMDLOCK, CFGCON0.PMUCLOCK and CFGCON0.PGLOCK register bits – This mechanism provides for a 1-way lock (once locked, only a reset can unlock) of the following registers:
- All PPS registers (IOLOCK bit)
- All PMD registers (PMDLOCK bit)
- CFGPG register (PGLOCK bit)
- All PMU registers (PMULOCK bit)
Locking using the CFGCON0.CFGLOCK[1:0] register bits – This mechanism provides for a 1-way or 2-way lock (software selectable). It applies to the following registers and memories:
- BCFG0
- CFGCON0
- CFGCON1
- CFGCON2
- CFGCON3
- USER_ID
- CFGCON4
- CFGPCLKGENx