5 Pinout and Signal Descriptions List

The following table provides details on signal names classified by the peripherals along with the device pinout for each variant of the PIC32CX-BZ2 SoC and WBZ45 module.

Table 5-1. Pinout and Signal Descriptions List
PIC32CX-BZ2 SoC WBZ45 Module Pad Name Peripherals
24032 25048 450 451 AC ADC EIC(4) GPIO (1, 2) QSPI RTCC SERCOM OSC RF DEBUG
1, 5, 8, 18, 21, 27 1, 2, 8, 11, 19, 26 GND — — — — — — — — — —
32 1 PMU_BK — — — — — — — — — —
1 2 VPMU_VDD — — — — — — — — — —
2 3 PMU_MLDO — — — — — — — — — —
4 20 PA0 — — — RA0 QSPI_DATA2 RTC_IN3 — — — —
5 21 PA1 AC_CMP1 — — RA1 QSPI_DATA3 RTC_IN2 — — — —
6 35 PA2 AC_CMP0 — — RA2 — RTC_IN1 — — — —
3 7 19 24 PA5 — — — RA5 — — SERCOM0_PAD0 — — —
4 8 16, 17 27, 28 VDD — — — — — — — — — —
5 9 20 25 PA6 AC_CMP1_ALT RA6 — — SERCOM0_PAD1 — — —
6 10 25 31 PA7 — — — RA7 — — SERCOM1_PAD0 — — TRACECLK
7 11 24 29 PA8 — — — RA8 — — SERCOM1_PAD1 — FECTRL0 —
8 12 22 30 PA9 — — — RA9 — RTC_IN0_ALT SERCOM1_PAD2 — FECTRL1 —
9 13 23 32 PA10 — — — RA10 — RTC_OUT_ALT SERCOM1_PAD3 — FECTRL2 —
14 22 PB12 — — — RB12 QSPI_DATA0 — — — — —
15 23 PB13 — — — RB13 QSPI_DATA1 RTC_EVENT — — — —
16 33 PA13 — — — RA13 — — SERCOM2_PAD0 — COEXCTRL0 —
17 34 PA14 — — — RA14 — — SERCOM2_PAD1 — COEXCTRL1 —
10 18 CLDO_OUT — — — — — — — — — —
11 19 BUCK_CLDO — — — — — — — — — —
12 20 EXTR(9) — — — — — — — — — —
13 21 BUCK_BB — — — — — — — — — —
14 22 XO_N — — — — — — — XO− — —
15 23 XO_P — — — — — — — XO+ — —
16 24 BUCK_PLL — — — — — — — — — —
17 25 BUCK_LPA — — — — — — — — — —
18 26 LPA_OUT — — — — — — — — LPA —
27 MPA_OUT — — — — — — — — MPA —
28 BUCK_MPA — — — — — — — — — —
19 29 2 3 NMCLR — — — — — — — — — —
20 30 3 4 PB0 AC_AIN2 AN4 — RB0 — — — — COEXCTRL2 —
21 31 10 38 PB1 AC_AIN3 AN5 — RB1 — — — — —
32 37 PB2 AC_AIN0 AN6 — RB2 — — — — — —
33 5 PB3 AC_AIN1 AN7 — RB3 — — — — — —
22 34 11 39 PB4 — AN0 INT0(11) RB4 — — — — FECTRL3 TRACEDATA3
23 35 9 6 PB5 — AN1 — RB5 — — — — FECTRL4 TRACEDATA0
24 36 4 7 AVDD — — — — — — — — —
25 37 12 12 PB6 — ANN0,AN2 — RB6 — — — — FECTRL5 TRACEDATA1
26 38 15 13 PB7 LVDIN AN3 — RB7 — — — — — TRACEDATA2, CM4_SWO
39 VDD — — — — — — — — — —
27 40 14 15 PB9 — — — RB9 — — — — — CM4_SWDIO
28 41 13 14 PB8 — — — RB8 — — — — — CM4_SWCLK
29(6) 42 6 16 PA4 — — — RA4 — RTC_OUT SERCOM0_PAD3 — — —
43 17 PB10 — — — RB10 QSPI_CS — — — — —
44 18 PB11 — — — RB11 QSPI_SCK — — — —
29 45 9 PA11 — — — RA11(5) — — — SOSCI — —
30 46 10 PA12 — — — RA12(5) — — — SOSCO — —
30(6) 47 7 36 PA3 — — — RA3 — RTC_IN0 SERCOM0_PAD2 SCLKI — —
31 48 PMU_VDD
26, 28, 29, 30 NC — — — — — — — — — —
Note:
  1. All GPIOs (RAn and RBn ) can be used by remappable peripherals via PPS.
  2. All GPIOs (RAn and RBn) can be used as I/O Change Notification (IOCAn and IOCBn) except RA11 and RA12. Please refer to Table 6-13 Port A Register Map for RA11 and RA12. CN register.
  3. The metal paddle at the bottom of the device must be connected to system ground.
  4. These peripherals have signals that are only available via the PPS remappable pins.
  5. This pin can be used as Input only pin if not using SOSC.
  6. For 24032 only, pin 29 and pin 30 act as GPIO PA4/PA3 respectively ONLY if CFGCON0.GPSOSCE = 0. If CFGCON0.GPSOSCE = 1, these pins are SOSC 32 kHz crystal inputs OR as digital input only RA11/RA12 respectively.
  7. For 25048 only, pin 29 and pin 30 can be configured as PA11 and PA12 by setting up CFGCON2.SOSCSEL = 0.
  8. External resistor used to set internal reference current of the SOC.

  9. Disable trace data output for SWD or 4-wire trace output are shared. To disable trace data output, use CFGCON0.SWOEN=0. To disable 4-wire trace output, use CFGCON0.TROEN=0.

  10. INT0 can be used as a wake-up source from Deep Sleep or Extreme Deep Sleep Low Power modes, as well as an ADC trigger source. The INT0 can be configured using Configuration Control Register 0 (CFGCON0). INT0 functionality on PB4 cannot be remapped using PPS. The software SDK and operational stacks provided by Microchip handles the operation of INT0 as a wake-up source in Deep Sleep Low Power Mode.

  11. These I/O pins are 5.5V tolerant: NMCLR, PA0, PA1, PA2, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA13,

    PA14, PB10, PB11, PB12, PB13. All other I/O pins are 3.3V tolerant.