31.5.1 I/O Lines
In order to use the SERCOM’s I/O lines, the I/O pins must be configured using the System Configuration registers or PPS registers.
When the SERCOM is configured for SPI
operation, the SERCOM controls the direction and value of the I/O pins according to the
following table. Both PORT Control bits PINCFGn.PULLEN and PINCFGn.DRVSTR are still
effective. If the receiver is disabled, the data input pin can be used for other purposes.
In Host mode, the Client Select line
(SS) is hardware controlled when the Host
Client Select Enable bit in the Control B register (CTRLB.MSSEN) is͑
‘1’.
| Pin | Host SPI | Client SPI |
|---|---|---|
| MOSI | Output | Input |
| MISO | Input | Output |
| SCK | Output | Input |
| SS | Output (CTRLB.MSSEN = 1) | Input |
The combined configuration of PORT, the Data In Pinout and the Data Out Pinout bit groups in the Control A register (CTRLA.DIPO and CTRLA.DOPO) define the physical position of the SPI signals in the table above.