36.5 I/O Pins

Figure 36-62. Fall Time vs. VDD (PORTCTRL.SRL = 0x00)
Figure 36-63. Fall Time vs. VDD (PORTCTRL.SRL = 0x01)
Figure 36-64. Rise Time vs. VDD (PORTCTRL.SRL = 0x00)
Figure 36-65. Rise Time vs. VDD (PORTCTRL.SRL = 0x01)
Figure 36-66. Input Pin with Schmitt Trigger - Maximum VIL vs. VDD
Figure 36-67. Input Pin with Schmitt Trigger - Minimum VIH vs. VDD
Figure 36-68. Input Pin with Schmitt Trigger - Hysteresis vs. VDD
Figure 36-69. Input Pin with I2C Trigger - Maximum VIL vs. VDD
Figure 36-70. Input Pin with I2C Trigger - Minimum VIH vs. VDD
Figure 36-71. Input Pin SMBus - Maximum VIL vs. VDD
Figure 36-72. Input Pin SMBus - Minimum VIH vs. VDD
Figure 36-73. Reset Pin VIL vs. VDD
Figure 36-74. Reset Pin VIH vs. VDD
Figure 36-75. Output Pin - Maximum VOL vs. Current, VDD = 1.8V
Figure 36-76. Output Pin - Minimum VOH vs. Current, VDD = 1.8V
Figure 36-77. Output Pin - Maximum VOL vs. Current, VDD = 3.0V
Figure 36-78. Output Pin - Minimum VOH vs. Current, VDD = 3.0V
Figure 36-79. Output Pin - Maximum VOL vs. Current, VDD = 5.5V
Figure 36-80. Output Pin - Minimum VOH vs. Current, VDD = 5.5V