15.1 Interrupt Operation

The compiler incorporates features allowing interrupts to be fully handled from C code. Interrupt functions are often called ISRs.

The DSC devices allow interrupts to be generated from many interrupt sources. Most sources have their own dedicated interrupt vector collated in an interrupt vector table (IVT). Each vector consists of an address at which is found the entry point of the interrupt service routine. Some of the interrupt table vector locations are for traps, which are non-maskable interrupts which deal with erroneous operation of the device, such as an address error.

On some devices, an alternate interrupt vector table (AIVT) is provided, which allows independent interrupt vectors to be specified. This table can be enabled when required, forcing ISR addresses to be read from the AIVT rather than the IVT.

Interrupts have a priority associated with them. This can be independently adjusted for each interrupt source. When more than interrupt with the same priority are pending at the same time, the intrinsic priority, or natural order priority, of each source comes into play. The natural order priority is typically the same as the order of the interrupt vectors in the IVT.

The compiler provides full support for interrupt processing in C or inline assembly code.

Interrupt code is the name given to any code that executes as a result of an interrupt occurring. Interrupt code completes at the point where the corresponding return from interrupt instruction is executed.

This contrasts with main-line code which, for a freestanding application, is usually the main part of the program that executes after Reset.