6.3 CONFIG3

Note: This register is reserved.
Name: CONFIG3
Offset: 0x8009

Configuration Word 3

Bit 15141312111098 
   WDTCCS[2:0]WDTCWS[2:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 111111 
Bit 76543210 
  WDTE[1:0]WDTCPS[4:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 1111111 

Bits 13:11 – WDTCCS[2:0] WDT Input Clock Selector

ValueNameDescription
xWDTE = 00These bits have no effect
111WDTE ≠ 00Software control
110 to 011WDTE ≠ 00Reserved
010WDTE ≠ 00WDT reference clock is the SOSC
001WDTE ≠ 00WDT reference clock is the 31.25 kHz MFINTOSC
000WDTE ≠ 00WDT reference clock is the 31.0 kHz LFINTOSC

Bits 10:8 – WDTCWS[2:0] WDT Window Select

WDTCWSWDTCON1[WINDOW] at PORSoftware Control of WINDOWKeyed Access Required?
ValueWindow Delay Percent of TimeWindow Opening Percent of Time
111111n/a100YesNo
110110n/a100NoYes
1011012575
10010037.562.5
0110115050
01001062.537.5
0010017525
00000087.512.5

Bits 6:5 – WDTE[1:0] WDT Operating Mode

ValueDescription
11WDT enabled regardless of Sleep; the SEN bit in WDTCON0 is ignored
10WDT enabled while Sleep = 0, suspended when Sleep = 1; the SEN bit in WDTCON0 is ignored
01WDT enabled/disabled by the SEN bit in WDTCON0
00WDT disabled, the SEN bit in WDTCON0 is ignored

Bits 4:0 – WDTCPS[4:0] WDT Period Select

WDTCPSWDTCON0[WDTPS] at PORSoftware Control of WDTPS?
ValueDivider RatioTypical Time-Out

(FIN = 31 kHz)

11111010111:655362162sYes
11110 to 1001111110 to 100111:32251 msNo
10010100101:8388608223256sNo
10001100011:4194304222128sNo
10000100001:209715222164sNo
01111011111:104857622032sNo
01110011101:52428821916sNo
01101011011:2621442188sNo
01100011001:1310722174sNo
01011010111:655362162sNo
01010010101:327682151sNo
01001010011:16384214512 msNo
01000010001:8192213256 msNo
00111001111:4096212128 msNo
00110001101:204821164 msNo
00101001011:102421032 msNo
00100001001:5122916 msNo
00011000111:256288 msNo
00010000101:128274 msNo
00001000011:64262 msNo
00000000001:32251 msNo