4.2 Multi-Voltage I/O

The PIC18F56Q24 features one MVIO domain powered by VDDIO2. Pins PC3 through PC6 and the pins in PORTD are powered through VDDIO2. The I/O pins connected to the MVIO feature are powered only by the additional VDDIO2 pin. If no power is supplied to this power pin, the associated I/O pins will not function.

VCC_TARGET supplies VDDIO2 by default. Removing the 0Ω resistor R105 disconnects the default power connection. After the removal, an external power supply can power the MVIO pins through the associated 1x2-100mil footprint (J107). The block diagram below details the connections to the VDDIO2 power domain.
Tip: The VDDIO2 supply voltage can go below the device’s minimum VDD of 1.8V, with a minimum voltage of 1.62V.
Figure 4-3. MVIO Block Diagram
Figure 4-4. VDDIO2 Connections
Warning: Before any hardware modifications, ensure the board is disconnected from the USB or external power.
Disconnecting VDDIO2:
  • Disconnect VDDIO2 from VCC_TARGET by removing resistor R105
  • Connect a new power supply to VDDIO2 and ground at J112
Warning: J112 does not have reverse polarity protection. Applying voltage to the wrong pin may cause permanent damage to the board.
Warning: Applying an external voltage to VDDIO2 without removing the resistor may cause permanent damage to the board!