Silicon Issue Summary
| Module | Feature | Item No. | Issue Summary | Affected Revisions | |
|---|---|---|---|---|---|
| A2 | A3 | ||||
| Electrical Specifications | SMBus 3.0 | 1.1.1 | SMBus 3.0 logic levels | X | X |
| FVR Accuracy | 1.1.2 | FVR output voltage may be higher than specified in the data sheet | X | X | |
| Direct Memory Access (DMA) | DMA in Doze Mode | 1.2.1 | DMA transfers may not work when the CPU is in Doze mode | X | |
| Analog-to-Digital Converter with Computation (ADCC) | Burst Average Mode | 1.3.1 | ADCC Burst Average Mode | X | |
| Nonvolatile Memory (NVM) Control | NVM Write Error | 1.4.1 | NVM Write Error (WRERR) bit is incorrectly set | X | |
| Windowed Watchdog Timer (WWDT) | WWDT Operation in Doze Mode | 1.5.1 | Window violation occurs when the WWDT is operated in Doze mode | X | |
| Power-Saving Operation Modes | Low-Power Sleep Mode | 1.6.1 | Low-Power Sleep mode does not operate at 3.1V < VDD < 3.3V in PIC18F25/26K83 devices | X | |
| Program Flash Memory (PFM) | Endurance of PFM Cell for LF Devices | 1.7.1 | Endurance of the PFM cell is lower than specified in PIC18LF25/26K83 devices | X | X |
| In-Circuit Debugging (ICD) | Software Breakpoints | 1.8.1 | Software breakpoints are not available | X | X |
| Inter-Integrated Circuit (I2C) | I2C Start/Stop Flags | 1.9.1 | The I2C Start and/or Stop flags may be set when I2C is enabled | X | X |
| Instruction Set | PUSHL Instruction | 1.10.1 | The PUSHL instruction incorrectly executes | X | X |
|
Note: Only those issues indicated in the last column
apply to the current silicon revision.
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