Jump to main content
Enhanced Constraint Flow for SmartFusion® 2, IGLOO® 2, and RTG4™ Devices
Enhanced Constraint Flow for SmartFusion® 2, IGLOO® 2, and RTG4™ Devices
  1. Home
  2. 8 Publish Block - Configuration Options
  3. 8.2 Publish Options

  • Introduction
  • 1 Creating Blocks - Options and Settings
  • 2 Instantiating Blocks in the Top-Level Design
  • 3 Hierarchical Structure Resolution in Top-Level Projects
  • 4 EDIF Netlist in the Top-Level Design
  • 5 Synthesis
  • 6 Resolving Place and Route Conflicts
  • 7 Block PDC Commands
  • 8 Publish Block - Configuration Options
    • 8.1 Publish Block Configuration
    • 8.2 Publish Options
    • 8.3 Publishing Blocks After Synthesis or Layout
  • 9 Revision History
  • Microchip FPGA Support
  • Microchip Information

8.2 Publish Options

Use the Publish Block - Configuration Options to configure the block for publication.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

About

Company
Careers
Contact Us
Media Center
Investor Relations
Corporate Responsibility

Support

Microchip Forums
AVR Freaks
Design Help
Technical Support
Export Control Data
PCNs

Quick Links

microchipDIRECT.com
Microchip University
myMicrochip
Blogs
Reference Designs
Parametric Search
Microchip Logo

Microchip Technology Inc.

2355 West Chandler Blvd.

Chandler, Arizona, USA

Microchip Facebook
Microchip LinkedIn
Microchip Twitter
Microchip Instagram
Microchip Weibo

© Copyright 1998-2024 Microchip Technology Inc. All rights reserved. Shanghai ICP Recordal No.09049794

Terms Of Use
Privacy Notice
Legal
Your Privacy Choices California Consumer Privacy Act (CCPA) Opt-Out Icon