43.11 10-Bit Analog-to-Digital Converter (ADC) Graphs Figure 43-64. ADC DNL vs ADC Code (VDD = 3.0V, TAD = 1 μs) Figure 43-65. ADC DNL vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 43-66. ADC DNL vs VREF+ (TAD = 1 μs, CPON = 'b11) Figure 43-67. ADC INL vs ADC Code (VDD = 3.0V, TAD = 1 μs) Figure 43-68. ADC INL vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 43-69. ADC INL vs VREF+ (TAD = 1 μs, CPON = 'b11) Figure 43-70. ADC Gain Error vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 43-71. ADC Gain Error vs VREF+ (TAD = 1 μs, CPON = 'b11) Figure 43-72. ADC Offset Error vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 43-73. ADC Offset Error vs VREF+ (TAD = 1 μs, CPON = 'b11)
