1.4 Software Features and Enhancements

Starting with the Libero SoC v2025.1 release, HDL+ core instances can be selected and copied from a SmartDesign and pasted into a new SmartDesign in any order, regardless of their original creation and instantiation sequence, without corrupting the SmartDesign canvas component and resulting in crashes.

Additionally, crashes related to hierarchical SmartDesign creation with HDL+ core instances being selected have also been resolved.

Libero SoC v2025.1 supports the export of STAPL files to program Micron MT25QL01G and MT25QL02G SPI-flash devices.

The Libero SoC 2025.1 release enhanced the programmer detection functionality in batch mode to automatically use the single programmer that is connected to the machine without having to explicitly specify it in TCL commands.

Libero SoC v2025.1 supports automatic license checkout from a secondary floating license server specified in the LM_LICENSE_FILE environment variable. If the primary server is exhausted, the secondary server is used to check out a license. A Libero instance can also be opened on another machine using the secondary server.

Libero SoC v2025.1 supports Identify ME version V-2023.09M-5, which introduces additional support for RTG4 Pre-arm trigger. This version provides debug support for the following devices as well:

• RT PolarFire
• RT PolarFire SoC

The Libero SoC v2025.1 release supports the upgraded v2024.3 versions of ModelSim ME Pro and QuestaSim ME simulation tools.

To enable better simulation runtime, QuestaSim ME optimizes designs during compilation by default. This optimization can sometimes result in the removal of signals or objects that the user might want to observe during simulation. The historical vsim argument called -novopt is now deprecated; instead, the simulator supports the -voptargs parameter, which allows users to add arguments that specify the level of optimization applied and the level of design object visibility during simulation. For example, the vsim argument -voptargs=+acc can be used to enable access to design objects that might otherwise be optimized away. For additional information, refer to the appropriate user guide from Siemens EDA (formerly Mentor Graphics).

The Libero SoC 2025.1 release has the following significant enhancements to the SmartTime tool:

• Ability to override the jitter value with clock uncertainty
• Support for Negative Uncertainty Values in SDC Editor
• Refined exception constraint resolution using get_clocks
• Generated clock duty-cycle update

Feedback messages from network connectivity checks have been improved. In particular, the messaging for failures related to the download_latest_cores command has been enhanced for better clarity and troubleshooting.

The Libero SoC 2025.1 release introduces a new QT-based installer that serves as a single point installation source for all Libero SoC products and, at the same time, significantly reduces installation time. This also addresses an installation issue relating to long paths on Windows.