5.1 Configure OP0 as a Voltage Follower

Todo:

Edit the OPAMP0_init() so it configures OP0 to be a voltage follower
Plot the input and output of OP0 in the MPLAB® Data Visualizer

Edit OPAMP0_init() to set the time base for the OPAMP peripheral by writing:
```
OPAMP.TIMEBASE = OPAMP_TIMEBASE_US;
```
Info: For internal timing purposes, the Timebase (OPAMP.TIMBASE) register needs the maximum number of CLK_PER cycles to achieve a timing interval equal to or larger than 1 µs. The rule to determine what number to write into the TIMBASE is: Determine the number of CLK_PER cycles equal to 1 µs. If this is an integer, subtract one. If not, round it down. The following macro can be used to calculate the value for the TIMEBASE register:
```
#define OPAMP_TIMEBASE_US     (ceil(F_CPU /1e6)-1)
```
Set the output mode to normal and the Always On (ALWAYSON) bit for OP0 by writing:
```
OPAMP.OP0CTRLA = OPAMP_OP0CTRLA_OUTMODE_NORMAL_gc | OPAMP_ALWAYSON_bm;
```
Info: Each op amp instance in the OPAMP peripheral has an independent output mode. The two modes are off and normal. In the off mode, the output driver for the op amp is off but can be overwritten by the DRIVE event. In the normal mode, the driver is always on.
Info: Each op amp instance in the OPAMP peripheral can be individually turned on or off. This can be achieved either by setting/clearing the ALWAYSON bit or by the ENABLEn/DISABLEn events. If events are used to control the op amp, the ALWAYSON bit has to be cleared.
Warning: The Event Enable (EVENTEN) bit must be set in the OPnCTRA register to control the op amp using events
Configure OP0 to be a voltage follower with the DAC as an input by writing:
```
OPAMP.OP0INMUX = OPAMP_OP0INMUX_MUXNEG_OUT_gc | OPAMP_OP0INMUX_MUXPOS_DAC_gc;

/* Configure the Op Amp n Resistor Wiper Multiplexer */
OPAMP.OP0RESMUX =  OPAMP_OP0RESMUX_MUXBOT_OFF_gc | OPAMP_OP0RESMUX_MUXWIP_WIP0_gc | 
                   OPAMP_OP0RESMUX_MUXTOP_OFF_gc;
```
Info:
Figure 5-1. Op Amp in Voltage Follower Configuration

To achieve a voltage follower configuration, the output of the op amp needs to be connected directly to the negative input. This is done by setting the Multiplexer for Negative Input (MUXNEG) bit field in the Op Amp n Input Multiplexer (OPnMUX) register to OUT. The output of the DAC and the positive input to OP0 are connected through an internal channel by setting the Multiplexer for Positive Input (MUXPOS) bit field in the OPnMUX register to DAC. There is no need to use the resistor ladder in the voltage follower, so all the bit fields in the Op Amp n Resistor Ladder Multiplexer (OPnRESMUX) register can be set to their default values.
Set the settling time by writing:
```
OPAMP.OP0SETTLE = OPAMP_MAX_SETTLE;
```
Info: The value in the Op Amp n Settle Timer (OPnSETTLE) register is the number of microseconds needed for the output of the op amp to settle. This time is highly application dependent. If it is not known, it is recommended to set it to the max value 0x7F. This value, together with the value in the TIMEBASE register, is used by an internal timer to determine when to generate the READYn event and set the SETTLED flag in the OPnSTATUS register.
Enable the OPAMP peripheral by writing:
```
OPAMP.CTRLA = OPAMP_ENABLE_bm;
```
Wait for the op amp to settle before leaving the initialization by checking the Op Amp has Settled (SETTLED) bit field in the Op Amp n Status (OPnSTATUS) register:
```
while (!(OPAMP.OP0STATUS & OPAMP_SETTLED_bm))
    {
        ;
    }
```
Verify that the solution/project builds by selecting the Build → Build Solution from the top menu bare in Atmel Studio or by pressing the F7 key.
Flash the device by selecting the Debug → Start without debugging from the top menu bar in Atmel Studio or by pressing the Ctrl+Alt+F5 keys.

Result: The device is now flashed and ready to start streaming data to the MPLAB® Data Visualizer.