43.8.14 Offset

Name: OFFSET
Offset: 0x1C
Reset: 0x0000
Property: Enable-Protected, PAC Write-Protection, not reset by a software reset

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
 OFFSETC[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 OFFSETC[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 OFFSETC[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 23:0 – OFFSETC[23:0] Offset Correction

This value from production test must be loaded from the NVM temperature calibration row into the register by software to achieve the specified accuracy.

The bitfield can also be written by CPU.

These bits define how the TSENS measurement result is compensated for offset error before being written to the VALUE register. This OFFSET value is in two’s complement format.