9.3 NVM User Row Mapping
The first two 32-bit words of the NVM User Row contains calibration data that are automatically read at device power on.
The NVM User Row can be read at address 0x804000.
To write the NVM User Row, refer to the NVMCTRL - Non-Volatile Memory Controller.
Note that when writing to the user row the values do not get loaded by the other modules on the device until a device reset occurs.
Bit Position | Name | Usage | Production setting | Related Peripheral Register |
---|---|---|---|---|
2:0 | BOOTPROT | Used to select one of eight different bootloader sizes. | 0x7 | NA, See table 27-2 |
3 | Reserved | - | 0x1 | - |
6:4 | EEPROM | Used to select one of eight different EEPROM Emulation area sizes. | 0x7 | NA, See table 27-3 |
7 | Reserved | - | 0x1 | - |
13:8 | BODVDD Level | BODVDD Threshold Level at power on. | 0x8 | SUPC.BODVDD.LEVEL |
14 | BODVDD Disable | BODVDD Disable at power on. | 0x0 (=BODVDD enabled) | SUPC.BODVDD.ENABLE |
16:15 | BODVDD Action | BODVDD Action at power on. | 0x1 | SUPC.BODVDD.ACTION |
25:17 | BODCORE calibration | DO NOT CHANGE (1) | 0xA8 | - |
26 | WDT Enable | WDT Enable at power on. | 0x0 | WDT.CTRLA.ENABLE |
27 | WDT Always-On | WDT Always-On at power on. | 0x0 | WDT.CTRLA.ALWAYSON |
31:28 | WDT Period | WDT Period at power on. | 0xB | WDT.CONFIG.PER |
35:32 | WDT Window | WDT Window mode time-out at power on. | 0xB | WDT.CONFIG.WINDOW |
39:36 | WDT EWOFFSET | WDT Early Warning Interrupt Time Offset at power on. | 0xB | WDT.EWCTRL.EWOFFSET |
40 | WDT WEN | WDT Timer Window Mode Enable at power on. | 0x0 | WDT.CTRLA.WEN |
41 | BODVDD Hysteresis | BODVDD Hysteresis configuration at power on. | 0x0 | SUPC.BODVDD.HYSTERESIS |
42 | BODCORE calibration | DO NOT CHANGE (1) | 0x0 | - |
47:43 | Reserved | - | 0x1F | - |
63:48 | LOCK | NVM Region Lock Bits. | 0xFFFF | NVMCTRL.LOCK |
Note:
- BODCORE is calibrated in production and its calibration parameters must not be changed to ensure the correct device behavior.