5.3 Register Properties

Registers can be 8, 16, or 32 bits wide. Atomic 8-bit, 16-bit, and 32-bit accesses are supported. In addition, the 8-bit quarters and 16-bit halves of a 32-bit register, as well as the 8-bit halves of a 16-bit register, can be accessed directly.

Registers can have one or multiple properties, as indicated in the register description:

PAC Write-Protection

Some registers can be write-protected by the Peripheral Access Controller (PAC).

PAC write protection is indicated by the “PAC Write-Protection” property in the register description. For more details, refer to the PAC - Peripheral Access Controller chapter.
Note: PAC Write-Protection is optional.

Local Write-Protection

Many peripherals offer a local, key-based write-protection mechanism for registers with write access. These peripherals have a Write Protection Control (WPCTRL) register, and the registers that can be protected bear the property “Local Write-Protection”.

Follow these steps to configure the optional local write-protection:
  • When writing to the WPCTRL register, the Write Protection Key (WPKEY) bit field must contain the specific KEY value.
  • The local write-protection is enabled by writing a '1' to the Write Protection Enable (WPEN) bit in the WPCTRL register.
  • The WPCTRL register itself can be protected by writing a '1' to the Write Protection Lock (WPLCK) bit. This bit can be cleared by a reset, but not by the application.
Note: The optional local write-protection mechanism is not preventing debugger access.

Enable-Protected

Some registers or bit fields can only be written when the peripheral is disabled, denoted by the “Enable-Protected” property in the register description.

Note: Enable-Protection is not optional.

Read-Synchronized, Write-Synchronized

Due to asynchronicity between the main clock domain and the peripheral clock domains, some registers or bit fields need to be synchronized when being written or read. Required write-synchronization is indicated by the “Write-Synchronized” property in the register description. For more details, refer to the Register Synchronization section in the CS - Clock System chapter.