12.5.3 Clocks
The OSCCTRL bus clock (CLK_OSCCTRL_APB) can be enabled and disabled in the Main Clock Controller and the default state can be found in the Peripheral Clock Masking section of the MCLK - Main Clock Controller chapter.
The OSCCTRL bus clock (CLK_OSCCTRL_APB) can be enabled and disabled in the Main Clock Controller and the default state can be found in the Peripheral Clock Masking section of the MCLK - Main Clock Controller chapter.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.