ATmega808/809/1608/1609 Silicon Errata and Data Sheet Clarification

5.1 Revision History


Doc Rev.	Date	Comments
C	07/2021	Removed silicon errata: “The CRCSCAN Background Mode May Fail During an EEPROM or USERROW Write/Erase” - not applicable Added data sheet clarifications: Ordering Information - Automotive Ordering Codes Are Available on Request
B	02/2021	Added new errata: Device: Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration Values CCL: The CCL Must be Disabled to Change the Configuration of a Single LUT CRCSCAN: The CRCSCAN Background Mode May Fail During an EEPROM or USERROW Write/Erase TCA: Restart Will Reset Counter Direction in NORMAL and FRQ Mode TCB: CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit PWM Mode USART: Open-Drain Mode Does Not Work When TXD is Configured as Output Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode
A	01/2020	Document Change document structure from one document for the entire megaAVR 0-series to one document per data sheet: from: megaAVR-0-series-Errata-and-Clarification-80000777C.pdf to: ATmega808_809_1608_1609-Errata-and-Clarification-DS80000868A.pdf Updated document template Errata The ADC errata, ADC Functionality Cannot be Ensured with ADCCLK Above 1.5 MHz for All Conditions, has been split into two separate erratas and rewritten

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.