2 Pin Descriptions

The descriptions of the pins are listed in Table 2-1.

Table 2-1. Pin Function Table
Name	8‑Lead SOIC	8‑Pad SOIJ	8‑Lead TSSOP	8‑Ball WLCSP	Function
NC	1	1	1	E1	Not Connected
A1⁽¹⁾	2	2	2	D2	Device Address Input
A2⁽¹⁾	3	3	3	C3	Device Address Input
GND	4	4	4	E3	Ground
SDA	5	5	5	A3	Serial Data
SCL	6	6	6	B2	Serial Clock
WP⁽¹⁾	7	7	7	C1	Write-Protect
V_CC	8	8	8	A1	Device Power Supply

Note:

If the A2, A1 or WP pins are not driven, they are internally pulled down to GND. In order to operate in a wide variety of application environments, the pull-down mechanism is intentionally designed to be somewhat strong. Once these pins are biased above the CMOS input buffer’s trip point (~0.5 x V_CC), the pull‑down mechanism disengages. Microchip recommends connecting these pins to a known state whenever possible.