12.4 Register Summary
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | MCLKCTRLA | 7:0 | CLKOUT | CLKSEL[3:0] | ||||||
| 0x01 | MCLKCTRLB | 7:0 | PDIV[3:0] | PEN | ||||||
| 0x02 | MCLKCTRLC | 7:0 | CFDSRC[1:0] | CFDTST | CFDEN | |||||
| 0x03 | MCLKINTCTRL | 7:0 | INTTYPE | CFD | ||||||
| 0x04 | MCLKINTFLAGS | 7:0 | CFD | |||||||
| 0x05 | MCLKSTATUS | 7:0 | EXTS | XOSC32KS | OSC32KS | OSCHFS | SOSC | |||
| 0x06 | MCLKTIMEBASE | 7:0 | TIMEBASE[4:0] | |||||||
0x07 | Reserved | |||||||||
| 0x08 | OSCHFCTRLA | 7:0 | RUNSTDBY | AUTOTUNE | ||||||
| 0x09 | OSCHFTUNE | 7:0 | TUNE[7:0] | |||||||
0x0A ... 0x17 | Reserved | |||||||||
| 0x18 | OSC32KCTRLA | 7:0 | RUNSTDBY | |||||||
0x19 ... 0x1B | Reserved | |||||||||
| 0x1C | XOSC32KCTRLA | 7:0 | RUNSTDBY | CSUT[1:0] | SEL | LPMODE | ENABLE | |||
0x1D ... 0x1F | Reserved | |||||||||
| 0x20 | XOSCHFCTRLA | 7:0 | RUNSTDBY | CSUTHF[1:0] | SELHF | ENABLE | ||||