6 Application Information
Layout Considerations
Layout plays a considerable role in noise and ringing in a circuit. Unwanted noise coupling, unpredicted glitches and abnormal operation could arise due to poor layout of the associated components. Figure 6-1 shows a half bridge schematic with parasitic inductance in the high current path (LP1, LP2, LP3, LP4) which would be caused by inductance in the metal of the trace. Considering Figure 6-1, the length of the tracks in red should be minimized, and the bootstrap capacitor (CB) and the decoupling capacitor (CD) should be placed as close to the IC as possible. Low ESR ceramic capacitors should be used to minimize inductance. Finally, the gate resistors (RGH and RGL) and the sense resistor (RS) should be surface mount devices. These suggestions will reduce the parasitics due to the PCB traces.
A layout example is seen in Figure 6-2. Here there are two bootstrap capacitors (CB1 and CB2) and two decoupling capacitors (C1 and C2). All of these capacitors are placed as close as possible to the HVIC. Even when only using one boostrap capacitor and one decoupling capacitor, it needs to be as close as possible to minimize inductance between the capacitor and the driver.
Generally, for the decoupling capacitor on VCC, at least one low ESR capacitor is recommended, and it should be placed as close to the device as possible. Figure 6-2 shows an example. The recommended values are 1 μF to 10 μF. A second smaller decoupling capacitor is sometimes added to provide better high frequency response (for example, 0.1 μF).
Please note the bootstrap capacitors (CB1, CB2), VCC capacitors (C1 and C2), and the bootstrap diode (DB1) adjacent to the IC (U1).
Application Example for MCP14LH2106
Application Example for MCP14LH21064
- RRG1 and RRG2 values are typically between 0Ω and 10Ω. The exact value is decided based on the MOSFET junction capacitance and the drive current of gate driver. A value of 10Ω is used in this example.
- It is highly recommended that the input pulse (to HIN and LIN) should have an amplitude of 2.5V minimum (for VDD = 15V), with a minimum pulse width of 440 ns.
- RG1 and RG2 values are typically between 10Ω and 100Ω. The exact value is decide based on the MOSFET junction capacitance and drive current of the gate driver. A value of 50Ω is used in this example.
- RB1 value is typically between 3Ω and 20Ω. The exact value is calculated based on the bootstrap capacitor value and the amount of current limiting required for bootstrap capacitor charging. A value of 10Ω is used in this example. Also, DB1 should be an ultra fast diode with a minimum rating of 1A and a voltage rating greater than the system operating voltage.
