12.5.1 Stack Pointer Register Low and
High byte
When addressing I/O Registers as data space using LD
and ST instructions, the provided offset must be used. When using the I/O specific
commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset
within 0x00 - 0x3F.
Reset value of SPL is RAMEND.
| Name: | SPL and SPH |
| Offset: | 0x5D |
| Reset: | 0xXX |
| Property: | When addressing as I/O
Register: address offset is 0x3D |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| | SP[15:8] | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | SP[7:0] | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | x | |
Bits 15:0 – SP[15:0] Stack Pointer
Address
