16.9.1 MCU Status Register
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
| Name: | MCUSR |
| Offset: | 0x54 |
| Reset: | 0x0X |
| Property: | When addressing as I/O Register: address offset is 0x34 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WDRT | BORF | EXTRF | PORF | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | x | x | x | 0 |
Bit 3 – WDRT Watchdog System Reset Flag
This bit is set if a Watchdog System Reset occurs. The bit is reset by a Power-on Reset, or by writing a '0' to the flag.
Bit 2 – BORF Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a '0' to the flag.
Bit 1 – EXTRF External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a '0' to the flag.
Bit 0 – PORF Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a '0' to the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then Reset the MCUSR as early as possible in the program. If the register is cleared before another reset occurs, the source of the reset can be found by examining the Reset Flags.