31.1.1 Performing Page Erase by Store Program Memory (SPM)

To execute Page Erase, set up the address in the Z-pointer (R30 and R31), write “0x00000011” to Store Program Memory Control and Status Register (SPMCSR) and execute Store Program Memory (SPM) within four clock cycles after writing SPMCSR. The data in R1 and R0 is ignored. The page address must be written to PCPAGE ([Z12:Z6]) in the Z-register. Other bits in the Z-pointer will be ignored during this operation.

• The CPU is halted during the Page Erase operation
  Note: If an interrupt occurs in the time sequence the four cycle access cannot be guaranteed. In order to ensure atomic operation you should disable interrupts before writing to SPMCSR.