27.5.3 Status

Offset: 0x02
Reset: 0x02
Property: -

Bit 76543210 
Access RR 
Reset 10 

Bit 1 – OK CRC OK

When this bit is read as ‘1’, the previous CRC completed successfully. The bit is set to ‘1’ by default before a CRC scan is run. The bit is not valid unless BUSY is ‘0’.

Bit 0 – BUSY CRC Busy

When this bit is read as ‘1’, the CRCSCAN is busy. As long as the module is busy, the access to the control registers is limited.