41.2.4 ATtiny417/817 - DS40001901

Obsolete Publication DS40001901D - 10/2019

Section	Changes
Electrical Characteristics	Added max./min. characteristics for AC Hysteresis ADC Characteristics: Added duty cycle note for clock frequencies above 1500 kHz PTC Characteristics - Operating Ratings: Removed VDD and CLKPER characteristics Added CLKADC characteristics

Obsolete Publication DS40001901C - 07/2019

Section	Changes
Document	Editorial updates.
Device	Introduction: Added a note for automotive data sheets Changed text to align with all tinyAVR® 0- and 1-series data sheets Retention endurance numbers added Data Sheet Clarification Document chapter added Ordering Information moved I/O Multiplexing and Considerations updated
Configuration and User Fuses	RSTPINCFG: Time-out after a system reset when fused to be GPIO explained
BOD - Brown-out Detector	Removed levels not characterized by minimum and maximum values Added a note for typical values and reference to electrical characteristics
TCA	Added a note for alternative WOn pins
USART	Clarified One-Wire mode Clarified text about Disabling the Transmitter Reverted 32±6 to 16±3 baud samples in RXMODE bits in CTRLB
SPI	Clarified functionality for SPI SS pin
CRCSCAN	Removed unsupported BACKGROUND and CONTINUOUS scan functionality
ADC - Analog-to-Digital Converter	Added missing calibration register
UPDI	Added a warning for ESD protection GPIO functionality disabled for a period after a system reset, changed from ms to clock cycles
Electrical Characteristics	Added a note for Chip Erase in General Operating Ratings Added Electrical Characteristics for PTC Corrected the description for some symbols in I/O Pin Characteristics table
Errata	Errata moved to ATtiny417/817 Silicon Errata and Data Sheet Clarification Document
Ordering Information	Updated with product page links and ordering codes
Product Identification System	Updated with Tube and Tray packing media
Package Drawings	Updated package drawings to Microchip standard

Obsolete Publication DS40001901B - 07/2017

Section	Changes
Document	Move ATtiny814 and ATtiny816 to new documents. Editorial updates.
PTC - Peripheral Touch Controller	Driven Shield function provided through X/Y pins. QTouch Library usage through Atmel | START.

Obsolete Publication DS40001913A - 04/2017

Section	Changes
Document	Microchip document style, assigned new document number. Previous version was Atmel document 42721C from 12/2016. PTC signals DS[1:0] removed from Block Diagram, I/O Multiplexing, PTC description - Driven Shield functionality is provided by any regular button signal. Typical Characteristics added. Editorial updates.
TCD	Editorial updates: peripheral name, clock signals, other.
USART	Bit field RXCIF in USART.STATUS register not cleared by writing to it. No DIF for IRCOM Event input.
SPI	No register SPI.DBGCTRL
Errata	AC Erratum 2 updated New Errata: AC Erratum 3 ADC Erratum 1 USART Erratum 1

Obsolete Publication 42721C - 12/2016

Section	Changes
Configuration Summary	ATtiny417 has no PTC channels.
Pinout, I/O Multiplexing and Considerations	TOSC1 is on PB3, TOSC2 is on PB2.
CLKCTRL - Clock Controller	Section on calibration drift correction for OSC20M added. Editorial updates.
FUSES - Configuration and User Fuses	Reset value of SYSCFG0 is 0xC4. Registers SIGROW.OSCxxERRnV added. Editorial updates.
SLPCTRL - Sleep Controller	Editorial updates.
EVSYS - Event System	Editorial updates.
VREF - Voltage Reference	Editorial updates.
TCA - 16-bit Timer/Counter	There is no capture on TCA.
TCB - 16-bit Timer/Counter	Combine the content in Asynchronous Output and Synchronous Output into the new section Output. Editorial updates.
RTC - Real-Time Counter	Editorial updates.
CRCSCAN - Cyclic Redundancy Check Memory Scan	Editorial updates.
ADC - Analog-to-Digital Converter	Positions of temperature offset and gain correction in SIGROW swapped. Editorial updates.
Electrical Characteristics	OSC20M Characteristics: Editorial updates.
Package Drawings	Updated GPC and respective dimensions: 14-pin SOIC150 (SVQ), 20-pin SOIC (SRJ), 20-pin VQFN (ZCL), and 24-pin QFN (ZHA). GPC added to Ordering Information Update package drawings Remove warning about preliminary package dimensions.
Errata	Section added.

Obsolete Publication 42721B - 11/2016

Section	Changes
Document	Section Conventions added. Peripheral sections: document structure updated. Presentation of 16-bit registers updated. Editorial updates throughout the document.
Pinout	Updated diagrams, legends.
SYSCFG - System Configuration	Content on debugging removed; see UPDI. Moved into section Memories.
I/O Multiplexing and Consideration	Signal names updated throughout the document.
AVR CPU	Invalid registers removed.
CLKCTRL - Clock Controller	Bit field in peripherals for clock selection is CLKSEL. CLKCTRL.XOSC32KCTRLA is under Configuration Change Protection.
FUSES - Configuration and User Fuses	OSCLOCK in FUSE.OSCCFG is loaded to LOCK in CLKCTRL.OSC20MCALIBB. SIGROW.TCD0CFG[7:4] - bit field names updated.
NVMCTRL - Nonvolatile Memory Controller	Flash sections re-organized. Command value expected within four instructions.
SLPCTRL- Sleep Controller	Abbreviation SLPCTRL. Behavior of peripherals in sleep modes updated.
CPUINT - CPU Interrupt Controller	CPUINT.LVL0PRI has no effect when Round Robin disabled.
EVSYS - Event System	CLKCTRL is no event user/generator. Signals EVOUT[2:0] added.
BOD - Brown-out Detector	Register at 0x08 is BOD.VLMCTRLA.
TCA - 16-bit Timer/Counter	Definitions updated. TCA clock is CLK_PER. CMPnOV in TCA.CTRLC.
TCB- 16-bit Timer/Counter	Definitions updated. Compare/Capture register is called TCB.CCMP.
TCD - 12-bit Timer/Counter	Input mode names updated.
RTC - Real-Time Counter	Runs in Idle sleep mode, and in Standby sleep mode if RUNSDTBY=1. RTC.CLKSEL: Bit field renamed CLKSEL. Name pattern for Busy flags in RTC.STATUS is 'xxxBUSY'. Invalid bit fields removed.
USART - Universal Synchronous and Asynchronous Receiver and Transmitter	Clock source is CLK_PER. USART.RXDATA is read-only. RXCIF and DREIF in USART.STATUS are read-only. Interrupt RXC is shared between RXCIE and ABEIE.
TWI - Two-Wire Interface	Supports Fm+ at 1MHz. No bridge mode supported.
CRCSCAN - Cyclic Redundancy Check Memory Scan	Features CRC-16-CCIT.
CCL - Configurable Custom Logic	LUT Control register name pattern is 'CCL.LUTnCTRLx'. Signal names updated. CCL.LUTCTRLBn: Description for INSEL1 updated.
ADC - Analog-to-Digital Converter	Free-running mode not available. SAMCAP=1 in ADC.CTRLC reduces sampling capacitance. Bit field at ADC.CTRLD[7:5] is INITDLY. Register at 0x05 is called ADC.SAMPCTRL. Register at 0x0C is called ADC.DBGCTRL. Invalid register bits removed.
DAC- Digital-to-Analog Converter	Signal name is OUT.
AC - Analog Comparator	Inputs have name pattern 'AINxn'. Band gap-derived DAC and AC voltage reference from VREF available as input. Bit AC.CTRLA[3] is LPMODE (Low Power Mode).
UPDI - Unified Program and Debug Interface	Abbreviation UPDI. Invalid register bits hidden. Output Enable Timer Protection for GPIO Configuration is 8.8ms. UPDI clock adjusted by UPDICLKSEL in UPDI.ASI_CTRLA. Register Description: ranges for physical configuration registers and ASI level registers updated. CS address block notation updated.
Electrical Characteristics	Updated/expanded: General Operating Ratings Voltage Protection Added: Power Consumption Wake-Up Time Peripherals Power Consumption RESET Oscillators and Clocks I/O Pin Characteristics Bandgap and VREF DAC, ADC, AC
Typical Characteristics	Power Consumption plots updated and expanded. New sections added: GPIO, VREF, BOD, ADC, AC OSC20M, OSCULP32K.

Obsolete Publication 42721A - 09/2016

Section	Changes
Document	Initial Release