21.5.10 Capture/Compare

The TCBn.CCMPL and TCBn.CCMPH register pair represents the 16-bit value TCBn.CCMP. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01.

This register has different functions depending on the mode of operation:
  • For Capture operation, these registers contain the captured value of the counter at the time the capture occurs
  • In Periodic Interrupt/Time-Out and Single-Shot mode, this register acts as the TOP value
  • In 8-bit PWM mode, TCBn.CCMPL and TCBn.CCMPH act as two independent registers: The period of the waveform is controlled by CCMPL, while CCMPH controls the duty cycle.
Name: CCMP
Offset: 0x0C
Reset: 0x00
Property: -

Bit 15141312111098 
 CCMP[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 CCMP[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 15:8 – CCMP[15:8] Capture/Compare Value High Byte

These bits hold the MSB of the 16-bit compare, capture, and top value.

Bits 7:0 – CCMP[7:0] Capture/Compare Value Low Byte

These bits hold the LSB of the 16-bit compare, capture, and top value.