Silicon Issue Summary
| Module | Feature | Item No. | Issue Summary | Affected Revisions | ||||
|---|---|---|---|---|---|---|---|---|
| B0 | B2 | B3 | B4 | D2 | ||||
| Analog-to-Digital Converter with Computation (ADCC) | Double Sample Conversions | 1.1.1 | An unexpected acquisition time is added between the first and second conversions | X | ||||
| Acquisition Time | 1.1.2 | Acquisition time cannot be changed through either the ADACQ or ADPRE registers | X | X | ||||
| Comparator (CMP) | Comparator 2 | 1.2.1 | Comparator 2 is not available on 8-pin devices | X | ||||
| Host Synchronous Serial Port (MSSP) | I2C Start and Stop Interrupt Function | 1.3.1 | A race condition can cause the Start and/or Stop flags to be set when I2C is enabled | X | ||||
| Configuration Words (CONFIG) | Sleep | 1.4.1 | Waking from Sleep may cause unexpected behavior | X | ||||
| Digital-to-Analog Converter (DAC) | DAC Auto Enable | 1.5.1 | Mid-band voltage spike at code 128 may occur when DACAUTOEN is enabled and the application is incrementing the DACxDATL register from 127 to 129 | X | X | |||
| Fixed Voltage Reference (FVR) | ADC Buffer | 1.6.1 | Power-down current (IPD) for the ADC FVR Buffer may be higher than the current data sheet limits | X | ||||
| Charge Pump | CPON | 1.7.1 | The CPON Bits Incorrectly Default to OFF Mode | X | X | X | X | X |
| Timer1 | Timer1 Gate Source | 1.8.1 | Changing the Timer1 Gate Source May Cause Unexpected Interrupts | X | X | X | X | |
| Capture/Compare/PWM (CCP) | Compare Toggle Mode | 1.9.1 | CCP Compare Toggle Output Mode Does Not Work as Expected | X | X | X | X | X |
|
Note:
Only those issues indicated in the last column
apply to the current silicon revision.
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