3.2 Watchdog Timer

A clarification has been made for the typical Watchdog Timer oscillator frequency.

The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at 1.25 MHz. A typical value at V_CC = 5V and a temperature of 25°C. See characterization data for typical values at other V_CC levels and/or temperatures. The Watchdog Reset interval can be adjusted by controlling the Watchdog Timer prescaler, as shown in Table 11-1 on page 50. The WDR – Watchdog Reset – instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs. Eight different clock cycle periods can be selected to determine the reset period. If the reset period expires without another Watchdog Reset, the ATmega32A resets and executes from the Reset Vector. For timing details on the Watchdog Reset, refer to page 47.