Once the DMA transfer is initiated, the corresponding value initialized in the DMAxSSZ and DMAxDSZ registers is loaded into the Source Count register (DMAxSCNT) and Destination Count register (DMAxDCNT). After every transaction, the DMAxSCNT and DMAxDCNT registers are decremented, thus indicating the number of bytes that are left in the current DMA message.
When the DMAxSCNT and DMAxDCNT registers equal to "1", they are reloaded with the value from the DMAxSSZ and DMAxDSZ registers, respectively. They are not dependent upon each other. If the source and destination sizes are different, they will reload at different times. The DMA operation can be stopped when either of these counters is reloaded, using the Source Counter Reload Stop bit (SSTP) and the Destination Counter Reload Stop bit (DSTP).
For example: Consider a case of transmitting 10 bytes of data from a buffer
in general purpose RAM to the UART transmit buffer. In this case, the source size
DMAxSSZ is 10 and the destination size DMAxDSZ is 1. If the DGO bit is set in software
to start the DMA transfer, the first byte is moved to the UART transmit buffer and then
the destination counter (DMAxDCNT) runs out. This will trigger a reload of the
destination counter (DMAxDCNT), but the source counter (DMAxSCNT) will stay at 9. If the
hardware trigger is not used, the user will need to set the DGO bit for every byte
transfer. If SSTP = 1 (clear the trigger and DGO bit when source
counter reloads) and the UART TX buffer empty interrupt is used as a trigger to the DMA
and DSTP = 0; the DMA will transfer all 10 bytes and then stop. Refer
to Example-2 for more details regarding the setup of
this operation.