Bitstream Generation

The Libero® SoC design suite generates the programming bitstream required for various programming modes. Depending on the requirement, the programming bitstream may contain one or more of the following components:

The following table lists the programming interfaces used in various programming modes and the associated bitstream formats.

Table 1. RT PolarFire FPGA Programming Interfaces and Bitstream Formats
Programming Mode Interface Master Bitstream Format
JTAG programming System controller’s dedicated JTAG FlashPro programmer STP
JTAG programming System controller’s dedicated JTAG External microprocessor DAT
JTAG programming System controller’s dedicated JTAG ChipPro solution using FlashPro6 STAPL
SPI slave programming System controller’s dedicated SPI FlashPro programmer DAT
SPI slave programming System controller’s dedicated SPI External microprocessor DAT
SPI master programming System controller’s dedicated SPI System controller SPI