The D flip-flop (DFF) is a widely used and is often called "data" or "delay" flip-flop. When G input is high, the flip-flop captures the value of the D-input and the captured value becomes the Q output. If the G input is low, the D input is ignored and the Q output is unchanged from its last state. The DFF can be seen as a memory cell, a zero-order hold, or a delay line.
The D-input is driven by the even LUT output (LUT0), and the G-input is driven by the odd LUT output (LUT1).
Figure 1. Gated D Flip-Flop
| R | G | D | OUT |
|---|---|---|---|
| 1 | X | X | Clear |
| 0 | 1 | 1 | Set |
| 0 | Clear | ||
| 0 | X | Hold state (no change) |