Contents
2. Silicon Issue Summary
3. Silicon Errata Issues
3.1. Errata Details
3.2. Device
3.2.1. Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration Values
3.3. ADC - Analog-to-Digital Converter
3.3.1. One Extra Measurement Performed After Disabling ADC Free-Running Mode
3.3.2. Pending Event Stuck When Disabling the ADC
3.3.3. ADC Performance Degrades with CLKADC Above 1.5 MHz and VDD < 2.7V
3.3.4. ADC Functionality Cannot be Ensured with CLKADC Above 1.5 MHz and a Setting of 25% Duty Cycle
3.4. CCL - Configurable Custom Logic
3.4.1. Connecting LUTs in Linked Mode Requires OUTEN Set to ‘1’
3.4.2. D-latch is Not Functional
3.4.3. The CCL Must be Disabled to Change the Configuration of a Single LUT
3.5. RTC - Real-Time Counter
3.5.1. Disabling the RTC Stops the PIT
3.5.2. Any Write to the RTC.CTRLA Register Resets the RTC and PIT Prescaler
3.6. TCA - 16-Bit Timer/Counter Type A
3.6.1. Restart Will Reset Counter Direction in NORMAL and FRQ Mode
3.7. TCB - 16-Bit Timer/Counter Type B
3.7.1. The TCA Restart Command Does Not Force a Restart of TCB
3.7.2. Minimum Event Duration Must Exceed the Selected Clock Period
3.7.3. CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit PWM Mode
3.8. USART - Universal Synchronous and Asynchronous Receiver and Transmitter
3.8.1. TXD Pin Override Not Released When Disabling the Transmitter
3.8.2. Open-Drain Mode Does Not Work When TXD is Configured as Output
3.8.3. Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode
4. Data Sheet Clarifications
4.1. None
5. Document Revision History
5.1. Revision History
5.2. Appendix - Obsolete Revision History
5.2.1. Obsolete Document DS40002126
5.2.2. Obsolete Document DS40002127
5.2.3. Obsolete Document DS40002128
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