8.3 Quality of Service (QoS) Overview

Quality of Service is extremely important in distributing the available resources (bandwidth or latency) among devices to meet overall performance requirements.

In the circuit, multiple hosts communicate with clients through interconnect. However, bandwidth-sensitive hosts can starve for data and latency-sensitive host requirements can be unsatisfied. This impacts the overall performance of the subsystem. QoS and Outstanding Capability address these types of performance issues in the subsystem.

Configuration can be done in different locations: NIC-400 Global Programmer's View (NICGPV), MATRIX, peripheral, UDDR Controller or SFR register.

Some peripherals embed bandwidth regulation. This feature is located in the NICGPV.