63.10 Register Summary


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	FLEX_MR	31:24
		23:16
		15:8
		7:0							OPMODE[1:0]
0x04 ... 0x0F	Reserved
0x10	FLEX_RHR	31:24
		23:16
		15:8	RXDATA[15:8]
		7:0	RXDATA[7:0]
0x14 ... 0x1F	Reserved
0x20	FLEX_THR	31:24
		23:16
		15:8	TXDATA[15:8]
		7:0	TXDATA[7:0]
0x24 ... 0x01FF	Reserved
0x0200	FLEX_US_CR	31:24	FIFODIS	FIFOEN		REQCLR		TXFLCLR	RXFCLR	TXFCLR
		23:16			LINWKUP	LINABT	RTSDIS	RTSEN
		15:8	RETTO	RSTNACK	RSTIT	SENDA	STTTO	STPBRK	STTBRK	RSTSTA
		7:0	TXDIS	TXEN	RXDIS	RXEN	RSTTX	RSTRX
0x0204	FLEX_US_MR	31:24	ONEBIT	MODSYNC	MAN	FILTER		MAX_ITERATION[2:0]
		23:16	INVDATA	VAR_SYNC	DSNACK	INACK	OVER	CLKO	MODE9	MSBF
		15:8	CHMODE[1:0]		NBSTOP[1:0]		PAR[2:0]			SYNC
		7:0	CHRL[1:0]		USCLKS[1:0]		USART_MODE[3:0]
0x0208	FLEX_US_IER (DEFAULT_MODE)	31:24								MANE
		23:16		CMP			CTSIC
		15:8			NACK			ITER	TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE			RXBRK	TXRDY	RXRDY
0x0208	FLEX_US_IER (LIN_MODE)	31:24	LINHTE	LINSTE	LINSNRE	LINCE	LINIPE	LINISFE	LINBE
		23:16
		15:8	LINTC	LINID	LINBK				TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE				TXRDY	RXRDY
0x020C	FLEX_US_IDR (DEFAULT_MODE)	31:24								MANE
		23:16		CMP			CTSIC
		15:8			NACK			ITER	TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE			RXBRK	TXRDY	RXRDY
0x020C	FLEX_US_IDR (LIN_MODE)	31:24	LINHTE	LINSTE	LINSNRE	LINCE	LINIPE	LINISFE	LINBE
		23:16
		15:8	LINTC	LINID	LINBK				TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE				TXRDY	RXRDY
0x0210	FLEX_US_IMR (DEFAULT_MODE)	31:24								MANE
		23:16		CMP			CTSIC
		15:8			NACK			ITER	TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE			RXBRK	TXRDY	RXRDY
0x0210	FLEX_US_IMR (LIN_MODE)	31:24	LINHTE	LINSTE	LINSNRE	LINCE	LINIPE	LINISFE	LINBE
		23:16
		15:8	LINTC	LINID	LINBK				TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE				TXRDY	RXRDY
0x0214	FLEX_US_CSR (DEFAULT_MODE)	31:24								MANE
		23:16	CTS	CMP			CTSIC
		15:8			NACK			ITER	TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE			RXBRK	TXRDY	RXRDY
0x0214	FLEX_US_CSR (LIN_MODE)	31:24	LINHTE	LINSTE	LINSNRE	LINCE	LINIPE	LINISFE	LINBE
		23:16	LINBLS
		15:8	LINTC	LINID	LINBK				TXEMPTY	TIMEOUT
		7:0	PARE	FRAME	OVRE				TXRDY	RXRDY
0x0218	FLEX_US_RHR (DEFAULT_MODE)	31:24
		23:16
		15:8	RXSYNH							RXCHR[8]
		7:0	RXCHR[7:0]
0x0218	FLEX_US_RHR (FIFO_MULTI_DATA)	31:24	RXCHR3[7:0]
		23:16	RXCHR2[7:0]
		15:8	RXCHR1[7:0]
		7:0	RXCHR0[7:0]
0x021C	FLEX_US_THR (DEFAULT_MODE)	31:24
		23:16
		15:8	TXSYNH							TXCHR[8]
		7:0	TXCHR[7:0]
0x021C	FLEX_US_THR (FIFO_MULTI_DATA)	31:24	TXCHR3[7:0]
		23:16	TXCHR2[7:0]
		15:8	TXCHR1[7:0]
		7:0	TXCHR0[7:0]
0x0220	FLEX_US_BRGR	31:24
		23:16						FP[2:0]
		15:8	CD[15:8]
		7:0	CD[7:0]
0x0224	FLEX_US_RTOR	31:24
		23:16								TO[16]
		15:8	TO[15:8]
		7:0	TO[7:0]
0x0228	FLEX_US_TTGR	31:24
		23:16
		15:8
		7:0	TG[7:0]
0x022C ... 0x023F	Reserved
0x0240	FLEX_US_FIDI	31:24
		23:16
		15:8	FI_DI_RATIO[15:8]
		7:0	FI_DI_RATIO[7:0]
0x0244	FLEX_US_NER	31:24
		23:16
		15:8
		7:0	NB_ERRORS[7:0]
0x0248 ... 0x024B	Reserved
0x024C	FLEX_US_IF	31:24
		23:16
		15:8
		7:0	IRDA_FILTER[7:0]
0x0250	FLEX_US_MAN	31:24	RXIDLEV	DRIFT	ONE	RX_MPOL			RX_PP[1:0]
		23:16					RX_PL[3:0]
		15:8				TX_MPOL			TX_PP[1:0]
		7:0					TX_PL[3:0]
0x0254	FLEX_US_LINMR	31:24
		23:16							SYNCDIS	PDCM
		15:8	DLC[7:0]
		7:0	WKUPTYP	FSDIS	DLM	CHKTYP	CHKDIS	PARDIS	NACT[1:0]
0x0258	FLEX_US_LINIR	31:24
		23:16
		15:8
		7:0	IDCHR[7:0]
0x025C	FLEX_US_LINBRR	31:24
		23:16						LINFP[2:0]
		15:8	LINCD[15:8]
		7:0	LINCD[7:0]
0x0260 ... 0x028F	Reserved
0x0290	FLEX_US_CMPR	31:24								VAL2[8]
		23:16	VAL2[7:0]
		15:8		CMPPAR	CMPMODE[1:0]					VAL1[8]
		7:0	VAL1[7:0]
0x0294 ... 0x029F	Reserved
0x02A0	FLEX_US_FMR	31:24			RXFTHRES2[5:0]
		23:16			RXFTHRES[5:0]
		15:8			TXFTHRES[5:0]
		7:0	FRTSC		RXRDYM[1:0]				TXRDYM[1:0]
0x02A4	FLEX_US_FLR	31:24
		23:16			RXFL[5:0]
		15:8
		7:0			TXFL[5:0]
0x02A8	FLEX_US_FIER	31:24
		23:16
		15:8							RXFTHF2
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x02AC	FLEX_US_FIDR	31:24
		23:16
		15:8							RXFTHF2
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x02B0	FLEX_US_FIMR	31:24
		23:16
		15:8							RXFTHF2
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x02B4	FLEX_US_FESR	31:24
		23:16
		15:8							RXFTHF2	TXFLOCK
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x02B8 ... 0x02E3	Reserved
0x02E4	FLEX_US_WPMR	31:24	WPKEY[23:16]
		23:16	WPKEY[15:8]
		15:8	WPKEY[7:0]
		7:0						WPCREN	WPITEN	WPEN
0x02E8	FLEX_US_WPSR	31:24
		23:16	WPVSRC[15:8]
		15:8	WPVSRC[7:0]
		7:0								WPVS
0x02EC ... 0x03FF	Reserved
0x0400	FLEX_SPI_CR	31:24	FIFODIS	FIFOEN						LASTXFER
		23:16							RXFCLR	TXFCLR
		15:8				REQCLR
		7:0	SWRST						SPIDIS	SPIEN
0x0404	FLEX_SPI_MR	31:24	DLYBCS[7:0]
		23:16					PCS[3:0]
		15:8				CMPMODE
		7:0	LLB		WDRBT	MODFDIS	BRSRCCLK	PCSDEC	PS	MSTR
0x0408	FLEX_SPI_RDR (DEFAULT_MODE)	31:24
		23:16					PCS[3:0]
		15:8	RD[15:8]
		7:0	RD[7:0]
0x0408	FLEX_SPI_RDR (FIFO_MULTI_DATA_8)	31:24	RD3[7:0]
		23:16	RD2[7:0]
		15:8	RD1[7:0]
		7:0	RD0[7:0]
0x0408	FLEX_SPI_RDR (FIFO_MULTI_DATA_16)	31:24	RD1[15:8]
		23:16	RD1[7:0]
		15:8	RD0[15:8]
		7:0	RD0[7:0]
0x040C	FLEX_SPI_TDR	31:24								LASTXFER
		23:16					PCS[3:0]
		15:8	TD[15:8]
		7:0	TD[7:0]
0x040C	FLEX_SPI_TDR (FIFO_MULTI_DATA)	31:24	TD1[15:8]
		23:16	TD1[7:0]
		15:8	TD0[15:8]
		7:0	TD0[7:0]
0x0410	FLEX_SPI_SR	31:24	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
		23:16								SPIENS
		15:8				SFERR	CMP	UNDES	TXEMPTY	NSSR
		7:0					OVRES	MODF	TDRE	RDRF
0x0414	FLEX_SPI_IER	31:24	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
		23:16
		15:8				SFERR	CMP	UNDES	TXEMPTY	NSSR
		7:0					OVRES	MODF	TDRE	RDRF
0x0418	FLEX_SPI_IDR	31:24	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
		23:16
		15:8				SFERR	CMP	UNDES	TXEMPTY	NSSR
		7:0					OVRES	MODF	TDRE	RDRF
0x041C	FLEX_SPI_IMR	31:24	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
		23:16
		15:8				SFERR	CMP	UNDES	TXEMPTY	NSSR
		7:0					OVRES	MODF	TDRE	RDRF
0x0420 ... 0x042F	Reserved
0x0430	FLEX_SPI_CSR0	31:24	DLYBCT[7:0]
		23:16	DLYBS[7:0]
		15:8	SCBR[7:0]
		7:0	BITS[3:0]				CSAAT	CSNAAT	NCPHA	CPOL
0x0434	FLEX_SPI_CSR1	31:24	DLYBCT[7:0]
		23:16	DLYBS[7:0]
		15:8	SCBR[7:0]
		7:0	BITS[3:0]				CSAAT	CSNAAT	NCPHA	CPOL
0x0438	FLEX_SPI_CSR2	31:24	DLYBCT[7:0]
		23:16	DLYBS[7:0]
		15:8	SCBR[7:0]
		7:0	BITS[3:0]				CSAAT	CSNAAT	NCPHA	CPOL
0x043C	FLEX_SPI_CSR3	31:24	DLYBCT[7:0]
		23:16	DLYBS[7:0]
		15:8	SCBR[7:0]
		7:0	BITS[3:0]				CSAAT	CSNAAT	NCPHA	CPOL
0x0440	FLEX_SPI_FMR	31:24			RXFTHRES[5:0]
		23:16			TXFTHRES[5:0]
		15:8
		7:0			RXRDYM[1:0]				TXRDYM[1:0]
0x0444	FLEX_SPI_FLR	31:24
		23:16			RXFL[5:0]
		15:8
		7:0			TXFL[5:0]
0x0448	FLEX_SPI_CMPR	31:24	VAL2[15:8]
		23:16	VAL2[7:0]
		15:8	VAL1[15:8]
		7:0	VAL1[7:0]
0x044C ... 0x04E3	Reserved
0x04E4	FLEX_SPI_WPMR	31:24	WPKEY[23:16]
		23:16	WPKEY[15:8]
		15:8	WPKEY[7:0]
		7:0						WPCREN	WPITEN	WPEN
0x04E8	FLEX_SPI_WPSR	31:24
		23:16
		15:8	WPVSRC[7:0]
		7:0								WPVS
0x04EC ... 0x05FF	Reserved
0x0600	FLEX_TWI_CR (DEFAULT_MODE)	31:24			FIFODIS	FIFOEN		LOCKCLR		THRCLR
		23:16					SCLRBE		ACMDIS	ACMEN
		15:8	CLEAR	PECRQ	PECDIS	PECEN	SMBDIS	SMBEN	HSDIS	HSEN
		7:0	SWRST	QUICK	SVDIS	SVEN	MSDIS	MSEN	STOP	START
0x0600	FLEX_TWI_CR (FIFO_ENABLED)	31:24			FIFODIS	FIFOEN		TXFLCLR	RXFCLR	TXFCLR
		23:16							ACMDIS	ACMEN
		15:8	CLEAR	PECRQ	PECDIS	PECEN	SMBDIS	SMBEN	HSDIS	HSEN
		7:0	SWRST	QUICK	SVDIS	SVEN	MSDIS	MSEN	STOP	START
0x0604	FLEX_TWI_MMR	31:24								NOAP
		23:16		DADR[6:0]
		15:8		SCLRBL[1:0]		MREAD			IADRSZ[1:0]
		7:0
0x0608	FLEX_TWI_SMR	31:24	DATAMEN	SADR3EN	SADR2EN	SADR1EN
		23:16		SADR[6:0]
		15:8		MASK[6:0]
		7:0	SNIFF	SCLWSDIS	BSEL	SADAT	SMHH	SMDA		NACKEN
0x060C	FLEX_TWI_IADR	31:24
		23:16	IADR[23:16]
		15:8	IADR[15:8]
		7:0	IADR[7:0]
0x0610	FLEX_TWI_CWGR	31:24			HOLD[5:0]
		23:16				BRSRCCLK		CKDIV[2:0]
		15:8	CHDIV[7:0]
		7:0	CLDIV[7:0]
0x0614 ... 0x061F	Reserved
0x0620	FLEX_TWI_SR (DEFAULT_MODE)	31:24						SR	SDA	SCL
		23:16	LOCK		SMBHHM	SMBDAM	PECERR	TOUT	SMBAF	MCACK
		15:8					EOSACC	SCLWS	ARBLST	NACK
		7:0	UNRE	OVRE	GACC	SVACC	SVREAD	TXRDY	RXRDY	TXCOMP
0x0620	FLEX_TWI_SR (FIFO_ENABLED)	31:24						SR	SDA	SCL
		23:16	TXFLOCK		SMBHHM	SMBDAM	PECERR	TOUT	SMBAF	MCACK
		15:8					EOSACC	SCLWS	ARBLST	NACK
		7:0	UNRE	OVRE	GACC	SVACC	SVREAD	TXRDY	RXRDY	TXCOMP
0x0624	FLEX_TWI_IER	31:24
		23:16			SMBHHM	SMBDAM	PECERR	TOUT		MCACK
		15:8	TXBUFE	RXBUFF	ENDTX	ENDRX	EOSACC	SCL_WS	ARBLST	NACK
		7:0	UNRE	OVRE	GACC	SVACC		TXRDY	RXRDY	TXCOMP
0x0628	FLEX_TWI_IDR	31:24
		23:16			SMBHHM	SMBDAM	PECERR	TOUT		MCACK
		15:8	TXBUFE	RXBUFF	ENDTX	ENDRX	EOSACC	SCL_WS	ARBLST	NACK
		7:0	UNRE	OVRE	GACC	SVACC		TXRDY	RXRDY	TXCOMP
0x062C	FLEX_TWI_IMR	31:24
		23:16			SMBHHM	SMBDAM	PECERR	TOUT		MCACK
		15:8	TXBUFE	RXBUFF	ENDTX	ENDRX	EOSACC	SCL_WS	ARBLST	NACK
		7:0	UNRE	OVRE	GACC	SVACC		TXRDY	RXRDY	TXCOMP
0x0630	FLEX_TWI_RHR (DEFAULT_MODE)	31:24
		23:16
		15:8				ASTATE[1:0]		PSTATE	SSTATE[1:0]
		7:0	RXDATA[7:0]
0x0630	FLEX_TWI_RHR (FIFO_ENABLED)	31:24	RXDATA3[7:0]
		23:16	RXDATA2[7:0]
		15:8	RXDATA1[7:0]
		7:0	RXDATA0[7:0]
0x0634	FLEX_TWI_THR (DEFAULT_MODE)	31:24
		23:16
		15:8
		7:0	TXDATA[7:0]
0x0634	FLEX_TWI_THR (FIFO_ENABLED)	31:24	TXDATA3[7:0]
		23:16	TXDATA2[7:0]
		15:8	TXDATA1[7:0]
		7:0	TXDATA0[7:0]
0x0638	FLEX_TWI_SMBTR	31:24	THMAX[7:0]
		23:16	TLOWM[7:0]
		15:8	TLOWS[7:0]
		7:0					PRESC[3:0]
0x063C	FLEX_TWI_HSR	31:24
		23:16
		15:8
		7:0	MCODE[7:0]
0x0640	FLEX_TWI_ACR	31:24							NPEC	NDIR
		23:16	NDATAL[7:0]
		15:8							PEC	DIR
		7:0	DATAL[7:0]
0x0644	FLEX_TWI_FILTR	31:24
		23:16
		15:8						THRES[2:0]
		7:0							PADFEN	FILT
0x0648	FLEX_TWI_HSCWGR	31:24
		23:16						HSCKDIV[2:0]
		15:8	HSCHDIV[7:0]
		7:0	HSCLDIV[7:0]
0x064C	FLEX_TWI_SWMR	31:24	DATAM[7:0]
		23:16		SADR3[6:0]
		15:8		SADR2[6:0]
		7:0		SADR1[6:0]
0x0650	FLEX_TWI_FMR	31:24			RXFTHRES[5:0]
		23:16			TXFTHRES[5:0]
		15:8
		7:0			RXRDYM[1:0]				TXRDYM[1:0]
0x0654	FLEX_TWI_FLR	31:24
		23:16			RXFL[5:0]
		15:8
		7:0			TXFL[5:0]
0x0658 ... 0x065F	Reserved
0x0660	FLEX_TWI_FSR	31:24
		23:16
		15:8
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x0664	FLEX_TWI_FIER	31:24
		23:16
		15:8
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x0668	FLEX_TWI_FIDR	31:24
		23:16
		15:8
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x066C	FLEX_TWI_FIMR	31:24
		23:16
		15:8
		7:0	RXFPTEF	TXFPTEF	RXFTHF	RXFFF	RXFEF	TXFTHF	TXFFF	TXFEF
0x0670 ... 0x06E3	Reserved
0x06E4	FLEX_TWI_WPMR	31:24	WPKEY[23:16]
		23:16	WPKEY[15:8]
		15:8	WPKEY[7:0]
		7:0						WPCREN	WPITEN	WPEN
0x06E8	FLEX_TWI_WPSR	31:24	WPVSRC[23:16]
		23:16	WPVSRC[15:8]
		15:8	WPVSRC[7:0]
		7:0								WPVS