2.3.1 Increased Offset in Single-Ended Mode

The ADC result has a typical offset of -3 mV (VDD = 3.0V, temp. = 25°C) when the ADC is operating in Single-Ended mode. The typical offset drift vs. VDD is -0.3 mV/V, and the typical offset drift vs. temperature is -0.02 mV/°C.

Work Around

To reduce the offset, use the ADC in Differential mode and connect the negative ADC input pin externally to GND.

Affected Silicon Revisions

Rev. A4 Rev. A5 Rev. B0
X - -