3.4.1 DAC Output
- The block diagram is updated with clarifications to the output signal routing (buffered/unbuffered) and will replace the original block diagram.
- Sections 34.3.2.3 (DAC as Source For Internal Peripherals) and 34.3.2.4 (DAC Output on Pin) are replaced by section 34.3.2.3 DAC Output.
Figure 34-1. DAC Block Diagram
34.3.2.3 DAC Output
DAC Output | Peripheral Input | Notes |
---|---|---|
Unbuffered |
|
The peripheral is connected to the unbuffered DAC output. See section 34.3.2.3.1. Unbuffered Output as Source For Internal Peripherals. |
Buffered |
|
The peripheral is connected to the DAC Output pin. See section 34.3.2.3.2. Buffered Output. |
34.3.2.3.1 Unbuffered Output as Source For Internal Peripherals
The unbuffered analog output of the DAC can be internally connected to other
peripherals when the ENABLE bit in the Control A (DACn.CTRLA) register is written to
‘1
’. When only the DAC unbuffered analog output is used, the
Output Buffer Enable (OUTEN) bit in DACn.CTRLA can be ‘0
’, freeing
the pin to be used by other peripherals.
34.3.2.3.2 Buffered Output
The buffered analog output of the DAC can be enabled by writing a ‘1
’
to the Output Buffer Enable (OUTEN) bit in the Control A (DACn.CTRLA) register. The
pin used by the DAC must have the input disabled from the Port peripheral. Refer to
the Electrical Characteristics section for information about the drive
capabilities of the DAC output buffer.