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Advanced Security and Features Set MCU PIC32CX SG41/SG60/SG61 Family Data Sheet
Advanced Security and Features Set MCU PIC32CX SG41/SG60/SG61 Family Data Sheet
Product Pages
PIC32CX1025SG41128 PIC32CX1025SG60100 PIC32CX1025SG60128 PIC32CX1025SG61100 PIC32CX1025SG61128
  1. Home
  2. 50 Hardware Security Module (HSM)
  3. 50.5 Peripheral Dependencies
  4. 50.5.3 Clocks

PIC32CX SG41/SG60/SG61 Family Data Sheet

  • 1-MB Flash, 256-KB SRAM with optional Hardware Security Module, Crypto, 1 MSPS 12-bit ADC, QSPI, USB, Ethernet, and PTC
  • 1 Configuration Summary
  • 2 Ordering Information
  • 3 Block Diagram
  • 4 Pinout and Packaging
  • 5 Signal Descriptions List
  • 6 Power Supplies
  • 7 Device Start-Up
  • 8 Product Mapping
  • 9 Memories
  • 10 Processor and Architecture
  • 11 Cortex-M Cache Controller (CMCC)
  • 12 Peripheral Access Controller (PAC)
  • 13 Device Service Unit (DSU)
  • 14 Clock System
  • 15 Generic Clock Controller (GCLK)

  • 16 Main Clock (MCLK)
  • 17 32.768 kHz Oscillators Controller (OSC32KCTRL)
  • 18 Oscillators Controller (OSCCTRL)
  • 19 Supply Controller (SUPC)
  • 20 Power Manager (PM)
  • 21 Reset Controller (RSTC)
  • 22 Watchdog Timer (WDT)
  • 23 Real-Time Counter (RTC)
  • 24 Frequency Meter (FREQM)
  • 25 Direct Memory Access Controller (DMAC)
  • 26 External Interrupt Controller (EIC)
  • 27 Non-Volatile Memory Controller (NVMCTRL)
  • 28 RAM Error Correction Code (RAMECC)
  • 29 I/O Pin Controller (PORT)
  • 30 Event System (EVSYS)
  • 31 Serial Communication Interface (SERCOM)
  • 32 SERCOM Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
  • 33 SERCOM Serial Peripheral Interface (SERCOM SPI)
  • 34 SERCOM Inter-Integrated Circuit (SERCOM I2C)
  • 35 Quad Serial Peripheral Interface (QSPI)
  • 36 SD/MMC Host Controller (SDHC)
  • 37 Inter-IC Sound Controller (I2S)
  • 38 Control Area Network (CAN)
  • 39 Parallel Capture Controller (PCC)
  • 40 Universal Serial Bus (USB)
  • 41 Ethernet MAC (GMAC)
  • 42 Position Decoder (PDEC)
  • 43 Configurable Custom Logic (CCL)
  • 44 Timer/Counter (TC)
  • 45 Timer/Counter for Control Applications (TCC)
  • 46 Advanced Encryption Standard (AES)
  • 47 Public Key Cryptography Controller (PUKCC)
  • 48 True Random Number Generator (TRNG)
  • 49 Integrity Check Monitor (ICM)
  • 50 Hardware Security Module (HSM)
    • 50.1 Overview
    • 50.2 Features
    • 50.3 Applications
    • 50.4 Signal Description
    • 50.5 Peripheral Dependencies
      • 50.5.1 I/O Lines
      • 50.5.2 Power Management
      • 50.5.3 Clocks
      • 50.5.4 Debug Operation
    • 50.6 Functional Description
  • 51 Analog-to-Digital Converter (ADC)
  • 52 Analog Comparators (AC)
  • 53 Digital-to-Analog Converter (DAC)
  • 54 Peripheral Touch Controller (PTC)
  • 55 Electrical Specifications 85°C
  • 56 Electrical Specifications 125°C
  • 57 Packaging Information
  • 58 Schematic Checklist
  • 59 Conventions
  • 60 Acronyms and Abbreviations
  • 61 PIC32CX SG41/SG60/SG61 Revision History
  • Microchip Information

50.5.3 Clocks

The SERCOM2 Clock (CLK_SERCOM2_APB) is used by the HSM and must be configured and enabled using the Generic Clock Controller (GCLK) and the Main Clock Controller (MCLK).

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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