Base setup for performing core
independent brushless DC motor (BLDC) commutation and dead-time insertion using
Configurable Custom Logic (CCL)
100% CPU available after
initialization for additional tasks like control, monitoring, and
communication
Motor commutation based on Hall
sensor signal using Analog Comparator
(AC) and Configurable Custom Logic (CCL)
Dead-time insertion based on Hall
sensor signal using Analog Comparator
(AC), Event System (EVSYS), and 16-bit Timer/Counter Type B
(TCB)
Pulse Width Modulated (PWM)
signal generation using 16-bit Timer/Counter Type A
(TCA)
Example setup for Microchip ATtiny817 Xplained Mini is provided
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