3.1.1 EUSART Description
Since the Manchester code is mainly based on transitions of the logic level of
the communication line, the easiest way to encode data for this type of modulation is using a
clock. The information will be represented by a clock pulse or by an inverted clock pulse.
Sending a logic ‘1
’ can be implemented by transmitting the clock period to
the DALI-2 bus, while sending a logic ‘0
’ can be implemented by transmitting
the inverted clock period to the DALI-2 bus.
For synchronization reasons, a peripheral that can generate its own clock is recommended: EUSART, SPI, etc. Since the DALI-2 frame might involve more than one byte of information, a peripheral that can continuously exchange data will be required, and so an Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) was used.
The EUSART is configured in Synchronous mode so it can generate its own clock
with a baud rate of 1200. The clock is configured as non-inverted, meaning that the line is
low in Idle state and the clock starts in logic ‘1
’. The DALI-2 frame begins
with a Start bit and is followed by one or more bytes, resulting in at least nine bits per
frame. Thus, the EUSART must be initially configured in a 9-bit mode and reconfigured in 8-bit
mode after the first byte, if the frame is not a backward frame and there is more information
to transmit.